1. Field of the Invention
Embodiments of the present invention relate generally to voltage generator circuits and, more specifically, to a common voltage generator circuit for liquid crystal displays.
2. Description of the Related Art
A modern liquid crystal display (LCD) screen is formed as an array of pixels that are backlit using a uniform polarized light source (backlight). Each pixel comprises at least one region of liquid crystal material sandwiched between two electrodes. A color LCD screen may use three regions of liquid crystal material to form one color pixel comprising red, green, and blue color components. The electrodes are fabricated from an electrically conductive material that is thin enough to be relatively transparent to light, allowing light to pass through both electrodes and each region of sandwiched liquid crystal material. One of the two electrodes is connected to a common voltage (VCOM), and the second electrode is connected to a column wire via a field effect transistor that is configured to connect the column wire to the second electrode in response to a row select signal on a corresponding row wire. The column wire is driven with a voltage value corresponding to a desired intensity for the associated liquid crystal region. A color LCD panel may need three column wires, corresponding to red, green, and blue color components, to determine a color value for one pixel. When a given row is selected, a voltage potential is established between the two electrodes, causing liquid crystal material in a corresponding region to modulate the polarization of light transmitted through the region. The transmitted light originates as polarized light from the backlight, passes through the liquid crystal material, and passes through a polarizing filter before exiting a viewing surface of an LCD panel. By modulating the polarization of the light transmitted through the liquid crystal region, the pixel brightness is correspondingly modulated when viewed from the viewing surface of the LCD panel.
Persons skilled in the art understand that the optimal VCOM voltage for a given LCD panel may vary on a panel-to-panel basis, based on manufacturing variation for the LCD panel. In other words, VCOM for each panel should be individually adjusted, preferably as part of a manufacturing process. One challenge in adjusting VCOM to an optimal value is that relatively small differences in VCOM can cause visible degradation in image quality of a particular LCD panel. For example, a difference of one millivolt can oftentimes have a perceptible effect on image quality. One common type of visible degradation appears as flicker in images displayed by the LCD panel. An analog variable resistor is sometimes used to adjust VCOM with millivolt resolution. However, the analog variable resistor introduces additional manufacturing costs and is therefore not a preferred solution in high-volume LCD manufacturing. A more efficient solution involves digitally adjusting VCOM, as described below in FIG. 1.
FIG. 1 illustrates a prior art digitally controlled common voltage generator circuit 100. The common voltage (VCOM) generator circuit 100 includes a voltage generator 130, and an output driver 132, which generates VCOM 190. VCOM 190 corresponds to a common voltage (VCOM) reference conventionally used in LCD panels. The voltage generator 130 receives an analog voltage on node VDDA 104, and a digital voltage on node VDDB 106. Each voltage is measured with respect to a ground (GND) node 102. The GND node 102 is defined as having a potential of zero volts. A reference voltage associated with VREFA 112, also measured with respect to GND 102, is generated from a resistor divider formed by resistors R 124 and R 122. VREFA 112 is generated according to a target specification for an associated LCD panel. Amplifier 120 is configured to form a voltage follower with a high-impedance input, which is connected to VREFA 112, and a low impedance output, which is connected to VREFB 114. The voltage follower drives VREFB 114 with a low impedance at a voltage corresponding closely to VREFA 112, thereby isolating VREFA 112 from variable sink currents drawn through an “R-2R” digital to analog converter (DAC) 140. Persons skilled in the art will understand that an R-2R DAC 140 presents a variable current load to node VREFB 114, and that the variable current load is a function of a digital DAC value 156. The DAC value 156 conventionally represents a fixed-length integer. Each integer represented by the DAC value 156 has a corresponding voltage value generated at VDAC 150. Each increment in the DAC value 156 has a corresponding voltage step at VDAC 150.
The DAC value 156 comprises a parallel vector transmitted from a serial digital controller 144 to a DAC decoder 142. The serial digital controller 144 receives a serial clock signal SCL 152 and a serial data signal SDA 154. A digital data vector is transmitted from an external device (not shown) via SCL 152 and SDA 154 for representation within the voltage generator 130 as DAC value 156. In one embodiment, the serial data controller 144 adheres to conventional “I2C” signaling.
In response to a given DAC value 156, the DAC decoder 142 generates control signals to activate one or more analog pass gates within the R-2R DAC 140 in order to produce a corresponding output voltage at VDAC 150. VDAC 150 is transmitted to the output driver 132, where amplifier 160, Q 162, and R 164 are configured to convert VDAC 150 to a current, which is sourced from node 188 and sinked through R 164 to GND 102. Resistor R 184 forms the top of a voltage divider, while R 182, Q 162 and R 164 form the bottom of the voltage divider, which is configured to generate a voltage on node 188 that is between VDDA 104 and GND 102. Amplifier 180 is configured as a voltage driver (follower), which drives VCOM 190 with a voltage corresponding closely to the voltage on node 188. Amplifier 180 should be configured to drive enough current to maintain a relatively stable voltage value on node VCOM 190.
One problem with prior art designs for the common voltage generator circuit 100 is that amplifier 120 is costly in terms of die area and power consumption. Additionally, amplifier 120 introduces an offset voltage between VREFA 112 and VREFB 114, that may commonly correspond to dozens of voltage steps at VDAC 150, thereby degrading accuracy and control in the prior art common voltage generator circuit 100. Additional die area or additional power consumption, or both, may be utilized as part of a design trade-off to attempt to reduce the offset voltage associated with amplifier 120. However, such trade-offs further reduce the efficiency of the overall common voltage generator circuit 100.
As the foregoing illustrates, what is needed in the art is a technique for precisely generating a digitally controlled voltage that is more efficient than in existing art.